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BAA 08-30 (Closed)
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Architecture-Aware Compiler Environment (AACE)
Program Manager: Dr. William Harrod (TCTO)
Mission:
The increasing complexity of modern computing systems inhibits the ability of application developers to achieve the performance necessary for critical national security applications. System builders currently employ a variety of techniques in the quest for system performance including multicore architectures, heterogeneous systems, and accelerators built from nontraditional processing elements e.g. graphics processing unit (GPU) and field programmable gate array (FPGA) devices. The ability to achieve even a reasonable fraction of a processing system’s peak throughput potential is a time consuming and complex task. As a result, the level of sophistication and expertise required to develop and tune application performance is growing with the complexity of the underlying processing systems, a fact that holds true from embedded real-time through all aspects of petascale and exascale computing systems.
Over the past twenty years, compiler-based tools have become the principal moderators of performance. Compilers, and their associated tools, have the primary responsibility for mapping an application onto the underlying hardware. It is typical for a user to provide substantial assistance in this process through source-level directives, direct specification of low-level application programming interfaces (APIs), and many other mechanisms. In the end, however, the application's implementation is bounded by the performance that the compiler is able to expose.
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