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Energy Starved Electronics (ESE)
Overview
The objective of the ESE program is to mature both device technology and design techniques to allow operation of devices in the sub-threshold (very low voltage) regime beyond where the circuit devices normally operate. The technology challenges to achieve this objective include advancing silicon fabrication processing techniques such as silicon on insulator (SOI) to yield devices that work at efficiently at very low current/voltage as well as circuit design methods for correcting errors on the fly caused by sub-threshold operation. The goal of the ESE program will be a 100X improvement in energy per operation over conventional designs operated at low voltage.
- Develop a robust design methodology and sub-threshold standard cell library
- Implement a feedback control scheme to achieve circuit operation at the minimum energy dissipation point
- Demonstrate ultra-dynamic voltage scaling methodology that allows performance and energy to be traded-off over several orders of magnitude.
- Develop and demonstrate fault-tolerant methodology for digital circuits to minimize effects of process variations and small signal margins
- Explore architectures to minimize the power dissipation of circuits in sub-threshold operation while keeping performance constant.
- Establish fundamental limits of energy dissipation of digital circuits taking into account process variations and device impairments (e.g., leakage)
- Identify and enhance the process/device technology that provides highest performance, lowest leakage circuits for operation at < 300mV