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Silicon-based Photonic Analog Signal Processing Engines with Reconfigurability (Si-PhASER)
Program Manager and PoC: Dr. Michael Haney
Document Type: Presolicitation Notice
Solicitation Number: BAA08-38
Posted Date: May 30, 2008
Original Response Date: July 14, 2008
Current Response Date: July 14, 2008
Original Archive Date: June 30, 2009
Current Archive Date: June 30, 2009
Classification Code: A -- Research & Development
Naics Code: 541 -- Professional, Scientific, and Technical Services/541712 -- Research and Development in the Physical, Engineering, and Life Sciences (except Biotechnology)
Description
DARPA is soliciting innovative research and development (R&D) proposals in the area of Silicon-based Photonic Analog Signal Processing Engines with Reconfigurability (Si-PhASER). The overall goal is the creation of novel silicon Photonic Integrated Circuit (PIC) elements and associated programmable filter array concepts, which can be fabricated in a CMOS-compatible process, and that enable high-throughput, low-power signal processors which overcome the limits of conventional electronic DSP technology. All administrative correspondence and questions on this solicitation, including requests for information on how to submit a proposal abstract or full proposal to this BAA, should be directed to BAA08-38@darpa.mil. See full BAA attached.
Contracting Office Address:
3701 North Fairfax Drive
Arlington, Virginia 22203-1714
Primary Point of Contact.:
Mike E. Haney,
Program Manager, MTO
BAA08-38@darpa.mil
Phone: 571-218-4813
Fax: 703-248-8053