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Mission Specific Processing (MSP)

Program Manager: Dr. Dean Collins (MTO)

Overview

The Mission Specific Processing (MSP) program extends technologies to support the design of highly optimized embedded processors that are required in the most severely constrained DoD applications. The technology developed by this program will facilitate high performance processing in future space based and miniature aero systems (unmanned air vehicles and missiles) that require extremely high processing throughput while consuming the minimum possible volume, weight and power. The focus is on providing a ten-fold gain in power-performance over current standard cell Application Specific Integrated Circuits (ASIC) designs by incorporating full-custom design optimizations into standard libraries. The MSP design flow methodology will be made available to organizations such as the Defense Microelectronics Activity (DMEA) and the Air Force Research Lab (AFRL). The MSP advanced processor will be used in DoD system demonstrations and an additional MSP chip test bed and radar simulator will be transitioned to the AFRL to enable potential Air Force system insertion.

Program Plans

  • Developed detailed system architecture of wideband adaptive radar/electronic intelligence /seeker receiver enabled by MSP method.
  • Developed a wideband adaptive radar receiver based on MSP custom cell libraries and modules.
  • Conducted simulation and benchmarking of initial custom design techniques in the context of mission specific signal processing requirements.
  • Demonstrated a ten-fold performance improvement in custom radar signal processing chips.
  • Completed library of key digital signal processing function kernels and supporting tool augmentations.
  • Completed development and demonstration of space-time adaptive processor for seeker-receiver.
  • Conducted first pass evaluation of semi-custom, full scale chip in a space-time adaptive receiver testbed.
  • Demonstrated full scale ASIC development using MSP architectures and techniques focusing on MSP design methodologies that reduce design time requirements as compared with full custom.
  • Completed a demonstration that addresses system level issues and quantifies the increased performance relative to standard cell ASIC designs.
  • Fabricated the MSP designed ASIC under DoD’s Trusted Foundry program.

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Last Updated: 7/19/07

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